/*******************************************************************************
*                                    ZLG
*                         ----------------------------
*                         innovating embedded platform
*
* Copyright (c) 2001-2021 Guangzhou ZHIYUAN Electronics Co., Ltd.
* All rights reserved.
*
* Contact information:
* web site:    https://www.zlg.cn
*******************************************************************************/
#ifndef __HC32F4A0_COMMON_H
#define __HC32F4A0_COMMON_H

#ifdef __cplusplus
extern "C" {
#endif  /* __cplusplus*/
#include <stdio.h>

/* \brief 布尔类型*/
typedef int          bool_t;

#ifndef TRUE
#define TRUE        (1)
#endif

#ifndef FALSE
#define FALSE       (0)
#endif

#ifndef NELEMENTS
/* \brief 计算数组元素个数*/
#define NELEMENTS(array)                  (sizeof (array) / sizeof ((array) [0]))
#endif

/* \brief 中断号定义*/
typedef enum IRQn{
    NMI_IRQn             = -14, /*  2 不可屏蔽中断   */
    HardFault_IRQn       = -13, /*  3 硬件错误          */
    MemManageFault_IRQn  = -12, /*  4 内存管理错误   */
    BusFault_IRQn        = -11, /*  5 总线错误           */
    UsageFault_IRQn      = -10, /*  6 Usage Fault                             */
    SVC_IRQn             = -5,  /* 11 SVCall                                  */
    DebugMonitor_IRQn    = -4,  /* 12 DebugMonitor                            */
    PendSV_IRQn          = -2,  /* 14 Pend SV                                 */
    SysTick_IRQn         = -1,  /* 15 System Tick                             */
    Int000_IRQn          = 0,
    Int001_IRQn          = 1,
    Int002_IRQn          = 2,
    Int003_IRQn          = 3,
    Int004_IRQn          = 4,
    Int005_IRQn          = 5,
    Int006_IRQn          = 6,
    Int007_IRQn          = 7,
    Int008_IRQn          = 8,
    Int009_IRQn          = 9,
    Int010_IRQn          = 10,
    Int011_IRQn          = 11,
    Int012_IRQn          = 12,
    Int013_IRQn          = 13,
    Int014_IRQn          = 14,
    Int015_IRQn          = 15,
    Int016_IRQn          = 16,
    Int017_IRQn          = 17,
    Int018_IRQn          = 18,
    Int019_IRQn          = 19,
    Int020_IRQn          = 20,
    Int021_IRQn          = 21,
    Int022_IRQn          = 22,
    Int023_IRQn          = 23,
    Int024_IRQn          = 24,
    Int025_IRQn          = 25,
    Int026_IRQn          = 26,
    Int027_IRQn          = 27,
    Int028_IRQn          = 28,
    Int029_IRQn          = 29,
    Int030_IRQn          = 30,
    Int031_IRQn          = 31,
    Int032_IRQn          = 32,
    Int033_IRQn          = 33,
    Int034_IRQn          = 34,
    Int035_IRQn          = 35,
    Int036_IRQn          = 36,
    Int037_IRQn          = 37,
    Int038_IRQn          = 38,
    Int039_IRQn          = 39,
    Int040_IRQn          = 40,
    Int041_IRQn          = 41,
    Int042_IRQn          = 42,
    Int043_IRQn          = 43,
    Int044_IRQn          = 44,
    Int045_IRQn          = 45,
    Int046_IRQn          = 46,
    Int047_IRQn          = 47,
    Int048_IRQn          = 48,
    Int049_IRQn          = 49,
    Int050_IRQn          = 50,
    Int051_IRQn          = 51,
    Int052_IRQn          = 52,
    Int053_IRQn          = 53,
    Int054_IRQn          = 54,
    Int055_IRQn          = 55,
    Int056_IRQn          = 56,
    Int057_IRQn          = 57,
    Int058_IRQn          = 58,
    Int059_IRQn          = 59,
    Int060_IRQn          = 60,
    Int061_IRQn          = 61,
    Int062_IRQn          = 62,
    Int063_IRQn          = 63,
    Int064_IRQn          = 64,
    Int065_IRQn          = 65,
    Int066_IRQn          = 66,
    Int067_IRQn          = 67,
    Int068_IRQn          = 68,
    Int069_IRQn          = 69,
    Int070_IRQn          = 70,
    Int071_IRQn          = 71,
    Int072_IRQn          = 72,
    Int073_IRQn          = 73,
    Int074_IRQn          = 74,
    Int075_IRQn          = 75,
    Int076_IRQn          = 76,
    Int077_IRQn          = 77,
    Int078_IRQn          = 78,
    Int079_IRQn          = 79,
    Int080_IRQn          = 80,
    Int081_IRQn          = 81,
    Int082_IRQn          = 82,
    Int083_IRQn          = 83,
    Int084_IRQn          = 84,
    Int085_IRQn          = 85,
    Int086_IRQn          = 86,
    Int087_IRQn          = 87,
    Int088_IRQn          = 88,
    Int089_IRQn          = 89,
    Int090_IRQn          = 90,
    Int091_IRQn          = 91,
    Int092_IRQn          = 92,
    Int093_IRQn          = 93,
    Int094_IRQn          = 94,
    Int095_IRQn          = 95,
    Int096_IRQn          = 96,
    Int097_IRQn          = 97,
    Int098_IRQn          = 98,
    Int099_IRQn          = 99,
    Int100_IRQn          = 100,
    Int101_IRQn          = 101,
    Int102_IRQn          = 102,
    Int103_IRQn          = 103,
    Int104_IRQn          = 104,
    Int105_IRQn          = 105,
    Int106_IRQn          = 106,
    Int107_IRQn          = 107,
    Int108_IRQn          = 108,
    Int109_IRQn          = 109,
    Int110_IRQn          = 110,
    Int111_IRQn          = 111,
    Int112_IRQn          = 112,
    Int113_IRQn          = 113,
    Int114_IRQn          = 114,
    Int115_IRQn          = 115,
    Int116_IRQn          = 116,
    Int117_IRQn          = 117,
    Int118_IRQn          = 118,
    Int119_IRQn          = 119,
    Int120_IRQn          = 120,
    Int121_IRQn          = 121,
    Int122_IRQn          = 122,
    Int123_IRQn          = 123,
    Int124_IRQn          = 124,
    Int125_IRQn          = 125,
    Int126_IRQn          = 126,
    Int127_IRQn          = 127,
    Int128_IRQn          = 128,
    Int129_IRQn          = 129,
    Int130_IRQn          = 130,
    Int131_IRQn          = 131,
    Int132_IRQn          = 132,
    Int133_IRQn          = 133,
    Int134_IRQn          = 134,
    Int135_IRQn          = 135,
    Int136_IRQn          = 136,
    Int137_IRQn          = 137,
    Int138_IRQn          = 138,
    Int139_IRQn          = 139,
    Int140_IRQn          = 140,
    Int141_IRQn          = 141,
    Int142_IRQn          = 142,
    Int143_IRQn          = 143,
} IRQn_Type;

typedef enum event_src {
    EVT_SWI_IRQ0             = 0U,
    EVT_SWI_IRQ1             = 1U,
    EVT_SWI_IRQ2             = 2U,
    EVT_SWI_IRQ3             = 3U,
    EVT_SWI_IRQ4             = 4U,
    EVT_SWI_IRQ5             = 5U,
    EVT_SWI_IRQ6             = 6U,
    EVT_SWI_IRQ7             = 7U,
    EVT_SWI_IRQ8             = 8U,
    EVT_SWI_IRQ9             = 9U,
    EVT_SWI_IRQ10            = 10U,
    EVT_SWI_IRQ11            = 11U,
    EVT_SWI_IRQ12            = 12U,
    EVT_SWI_IRQ13            = 13U,
    EVT_SWI_IRQ14            = 14U,
    EVT_SWI_IRQ15            = 15U,
    EVT_SWI_IRQ16            = 16U,
    EVT_SWI_IRQ17            = 17U,
    EVT_SWI_IRQ18            = 18U,
    EVT_SWI_IRQ19            = 19U,
    EVT_SWI_IRQ20            = 20U,
    EVT_SWI_IRQ21            = 21U,
    EVT_SWI_IRQ22            = 22U,
    EVT_SWI_IRQ23            = 23U,
    EVT_SWI_IRQ24            = 24U,
    EVT_SWI_IRQ25            = 25U,
    EVT_SWI_IRQ26            = 26U,
    EVT_SWI_IRQ27            = 27U,
    EVT_SWI_IRQ28            = 28U,
    EVT_SWI_IRQ29            = 29U,
    EVT_SWI_IRQ30            = 30U,
    EVT_SWI_IRQ31            = 31U,
    /* External Interrupt  */
    EVT_PORT_EIRQ0           = 0U,
    EVT_PORT_EIRQ1           = 1U,
    EVT_PORT_EIRQ2           = 2U,
    EVT_PORT_EIRQ3           = 3U,
    EVT_PORT_EIRQ4           = 4U,
    EVT_PORT_EIRQ5           = 5U,
    EVT_PORT_EIRQ6           = 6U,
    EVT_PORT_EIRQ7           = 7U,
    EVT_PORT_EIRQ8           = 8U,
    EVT_PORT_EIRQ9           = 9U,
    EVT_PORT_EIRQ10          = 10U,
    EVT_PORT_EIRQ11          = 11U,
    EVT_PORT_EIRQ12          = 12U,
    EVT_PORT_EIRQ13          = 13U,
    EVT_PORT_EIRQ14          = 14U,
    EVT_PORT_EIRQ15          = 15U,
    /*  DMA_1  */
    EVT_DMA1_TC0             = 32U,
    EVT_DMA1_TC1             = 33U,
    EVT_DMA1_TC2             = 34U,
    EVT_DMA1_TC3             = 35U,
    EVT_DMA1_TC4             = 36U,
    EVT_DMA1_TC5             = 37U,
    EVT_DMA1_TC6             = 38U,
    EVT_DMA1_TC7             = 39U,
    EVT_DMA1_BTC0            = 40U,
    EVT_DMA1_BTC1            = 41U,
    EVT_DMA1_BTC2            = 42U,
    EVT_DMA1_BTC3            = 43U,
    EVT_DMA1_BTC4            = 44U,
    EVT_DMA1_BTC5            = 45U,
    EVT_DMA1_BTC6            = 46U,
    EVT_DMA1_BTC7            = 47U,
    /*  EFM  */
    EVT_EFM_OPTEND           = 51U,
    /*  USBFS  */
    EVT_USBFS_SOF            = 52U,
    /*  USBHS  */
    EVT_USBHS_SOF            = 53U,
    /*  DCU  */
    EVT_DCU1                 = 55U,
    EVT_DCU2                 = 56U,
    EVT_DCU3                 = 57U,
    EVT_DCU4                 = 58U,
    EVT_DCU5                 = 59U,
    EVT_DCU6                 = 60U,
    EVT_DCU7                 = 61U,
    EVT_DCU8                 = 62U,
    /*  DMA_2  */
    EVT_DMA2_TC0             = 64U,
    EVT_DMA2_TC1             = 65U,
    EVT_DMA2_TC2             = 66U,
    EVT_DMA2_TC3             = 67U,
    EVT_DMA2_TC4             = 68U,
    EVT_DMA2_TC5             = 69U,
    EVT_DMA2_TC6             = 70U,
    EVT_DMA2_TC7             = 71U,
    EVT_DMA2_BTC0            = 72U,
    EVT_DMA2_BTC1            = 73U,
    EVT_DMA2_BTC2            = 74U,
    EVT_DMA2_BTC3            = 75U,
    EVT_DMA2_BTC4            = 76U,
    EVT_DMA2_BTC5            = 77U,
    EVT_DMA2_BTC6            = 78U,
    EVT_DMA2_BTC7            = 79U,
    /*  MAU  */
    EVT_MAU_SQRT             = 83U,
    /*  DVP  */
    EVT_DVP_FRAMSTA          = 84U,
    EVT_DVP_LINESTA          = 85U,
    EVT_DVP_LINEEND          = 86U,
    EVT_DVP_FRAMEND          = 87U,
    EVT_DVP_SQUERR           = 88U,
    EVT_DVP_FIFOERR          = 89U,
    EVT_DVP_DMAREQ           = 90U,
    /*  FMAC  */
    EVT_FMAC_1               = 91U,
    EVT_FMAC_2               = 92U,
    EVT_FMAC_3               = 93U,
    EVT_FMAC_4               = 94U,
    /*  TIMER0  */
    EVT_TMR0_1_CMPA          = 96U,
    EVT_TMR0_1_CMPB          = 97U,
    EVT_TMR0_2_CMPA          = 98U,
    EVT_TMR0_2_CMPB          = 99U,
    /*  TIMER2  */
    EVT_TMR2_1_CMPA          = 100U,
    EVT_TMR2_1_CMPB          = 101U,
    EVT_TMR2_1_OVFA          = 102U,
    EVT_TMR2_1_OVFB          = 103U,
    EVT_TMR2_2_CMPA          = 104U,
    EVT_TMR2_2_CMPB          = 105U,
    EVT_TMR2_2_OVFA          = 106U,
    EVT_TMR2_2_OVFB          = 107U,
    EVT_TMR2_3_CMPA          = 108U,
    EVT_TMR2_3_CMPB          = 109U,
    EVT_TMR2_3_OVFA          = 110U,
    EVT_TMR2_3_OVFB          = 111U,
    EVT_TMR2_4_CMPA          = 112U,
    EVT_TMR2_4_CMPB          = 113U,
    EVT_TMR2_4_OVFA          = 114U,
    EVT_TMR2_4_OVFB          = 115U,
    /*  RTC  */
    EVT_RTC_ALM              = 121U,
    EVT_RTC_PRD              = 122U,
    /*  TIMER6_1  */
    EVT_TMR6_1_GCMA          = 128U,
    EVT_TMR6_1_GCMB          = 129U,
    EVT_TMR6_1_GCMC          = 130U,
    EVT_TMR6_1_GCMD          = 131U,
    EVT_TMR6_1_GCME          = 132U,
    EVT_TMR6_1_GCMF          = 133U,
    EVT_TMR6_1_GOVF          = 134U,
    EVT_TMR6_1_GUDF          = 135U,
    /*  TIMER4_1  */
    EVT_TMR4_1_SCMUH         = 136U,
    EVT_TMR4_1_SCMUL         = 137U,
    EVT_TMR4_1_SCMVH         = 138U,
    EVT_TMR4_1_SCMVL         = 139U,
    EVT_TMR4_1_SCMWH         = 140U,
    EVT_TMR4_1_SCMWL         = 141U,
    /*  TIMER6_2  */
    EVT_TMR6_2_GCMA          = 144U,
    EVT_TMR6_2_GCMB          = 145U,
    EVT_TMR6_2_GCMC          = 146U,
    EVT_TMR6_2_GCMD          = 147U,
    EVT_TMR6_2_GCME          = 148U,
    EVT_TMR6_2_GCMF          = 149U,
    EVT_TMR6_2_GOVF          = 150U,
    EVT_TMR6_2_GUDF          = 151U,
    /*  TIMER4_2  */
    EVT_TMR4_2_SCMUH         = 152U,
    EVT_TMR4_2_SCMUL         = 153U,
    EVT_TMR4_2_SCMVH         = 154U,
    EVT_TMR4_2_SCMVL         = 155U,
    EVT_TMR4_2_SCMWH         = 156U,
    EVT_TMR4_2_SCMWL         = 157U,
    /*  TIMER6_3  */
    EVT_TMR6_3_GCMA          = 160U,
    EVT_TMR6_3_GCMB          = 161U,
    EVT_TMR6_3_GCMC          = 162U,
    EVT_TMR6_3_GCMD          = 163U,
    EVT_TMR6_3_GCME          = 164U,
    EVT_TMR6_3_GCMF          = 165U,
    EVT_TMR6_3_GOVF          = 166U,
    EVT_TMR6_3_GUDF          = 167U,
    /*  TIMER4_3  */
    EVT_TMR4_3_SCMUH         = 168U,
    EVT_TMR4_3_SCMUL         = 169U,
    EVT_TMR4_3_SCMVH         = 170U,
    EVT_TMR4_3_SCMVL         = 171U,
    EVT_TMR4_3_SCMWH         = 172U,
    EVT_TMR4_3_SCMWL         = 173U,
    /*  TIMER6  */
    EVT_TMR6_1_SCMA          = 179U,
    EVT_TMR6_1_SCMB          = 180U,
    EVT_TMR6_2_SCMA          = 187U,
    EVT_TMR6_2_SCMB          = 188U,
    EVT_TMR6_3_SCMA          = 195U,
    EVT_TMR6_3_SCMB          = 196U,
    EVT_TMR6_4_GCMA          = 208U,
    EVT_TMR6_4_GCMB          = 209U,
    EVT_TMR6_4_GCMC          = 210U,
    EVT_TMR6_4_GCMD          = 211U,
    EVT_TMR6_4_GCME          = 212U,
    EVT_TMR6_4_GCMF          = 213U,
    EVT_TMR6_4_GOVF          = 214U,
    EVT_TMR6_4_GUDF          = 215U,
    EVT_TMR6_4_SCMA          = 219U,
    EVT_TMR6_4_SCMB          = 220U,
    EVT_TMR6_5_GCMA          = 224U,
    EVT_TMR6_5_GCMB          = 225U,
    EVT_TMR6_5_GCMC          = 226U,
    EVT_TMR6_5_GCMD          = 227U,
    EVT_TMR6_5_GCME          = 228U,
    EVT_TMR6_5_GCMF          = 229U,
    EVT_TMR6_5_GOVF          = 230U,
    EVT_TMR6_5_GUDF          = 231U,
    EVT_TMR6_5_SCMA          = 235U,
    EVT_TMR6_5_SCMB          = 236U,
    /*  TIMERA_1  */
    EVT_TMRA_1_OVF           = 237U,
    EVT_TMRA_1_UDF           = 238U,
    EVT_TMRA_1_CMP           = 239U,
    /*  TIMER6_6  */
    EVT_TMR6_6_GCMA          = 240U,
    EVT_TMR6_6_GCMB          = 241U,
    EVT_TMR6_6_GCMC          = 242U,
    EVT_TMR6_6_GCMD          = 243U,
    EVT_TMR6_6_GCME          = 244U,
    EVT_TMR6_6_GCMF          = 245U,
    EVT_TMR6_6_GOVF          = 246U,
    EVT_TMR6_6_GUDF          = 247U,
    EVT_TMR6_6_SCMA          = 251U,
    EVT_TMR6_6_SCMB          = 252U,
    /*  TIMERA_2  */
    EVT_TMRA_2_OVF           = 253U,
    EVT_TMRA_2_UDF           = 254U,
    EVT_TMRA_2_CMP           = 255U,
    /*  TIMER6_7  */
    EVT_TMR6_7_GCMA          = 256U,
    EVT_TMR6_7_GCMB          = 257U,
    EVT_TMR6_7_GCMC          = 258U,
    EVT_TMR6_7_GCMD          = 259U,
    EVT_TMR6_7_GCME          = 260U,
    EVT_TMR6_7_GCMF          = 261U,
    EVT_TMR6_7_GOVF          = 262U,
    EVT_TMR6_7_GUDF          = 263U,
    EVT_TMR6_7_SCMA          = 267U,
    EVT_TMR6_7_SCMB          = 268U,
    /*  TIMERA_3  */
    EVT_TMRA_3_OVF           = 269U,
    EVT_TMRA_3_UDF           = 270U,
    EVT_TMRA_3_CMP           = 271U,
    /*  TIMER6_8  */
    EVT_TMR6_8_GCMA          = 272U,
    EVT_TMR6_8_GCMB          = 273U,
    EVT_TMR6_8_GCMC          = 274U,
    EVT_TMR6_8_GCMD          = 275U,
    EVT_TMR6_8_GCME          = 276U,
    EVT_TMR6_8_GCMF          = 277U,
    EVT_TMR6_8_GOVF          = 278U,
    EVT_TMR6_8_GUDF          = 279U,
    EVT_TMR6_8_SCMA          = 283U,
    EVT_TMR6_8_SCMB          = 284U,
    /*  TIMERA_4  */
    EVT_TMRA_4_OVF           = 285U,
    EVT_TMRA_4_UDF           = 286U,
    EVT_TMRA_4_CMP           = 287U,
    /*  AOS_STRG  */
    EVT_AOS_STRG             = 299U,
    /*  USART1 USART2  */
    EVT_USART1_EI            = 300U,
    EVT_USART1_RI            = 301U,
    EVT_USART1_TI            = 302U,
    EVT_USART1_TCI           = 303U,
    EVT_USART1_RTO           = 304U,
    EVT_USART2_EI            = 305U,
    EVT_USART2_RI            = 306U,
    EVT_USART2_TI            = 307U,
    EVT_USART2_TCI           = 308U,
    EVT_USART2_RTO           = 309U,
    /*  SPI1 SPI2  */
    EVT_SPI1_SPRI            = 310U,
    EVT_SPI1_SPTI            = 311U,
    EVT_SPI1_SPII            = 312U,
    EVT_SPI1_SPEI            = 313U,
    EVT_SPI1_SPEND           = 314U,
    EVT_SPI2_SPRI            = 315U,
    EVT_SPI2_SPTI            = 316U,
    EVT_SPI2_SPII            = 317U,
    EVT_SPI2_SPEI            = 318U,
    EVT_SPI2_SPEND           = 319U,
    /*  TIMERA_5 TIMERA_6 TIMERA_7 TIMERA_8  */
    EVT_TMRA_5_OVF           = 320U,
    EVT_TMRA_5_UDF           = 321U,
    EVT_TMRA_5_CMP           = 322U,
    EVT_TMRA_6_OVF           = 323U,
    EVT_TMRA_6_UDF           = 324U,
    EVT_TMRA_6_CMP           = 325U,
    EVT_TMRA_7_OVF           = 326U,
    EVT_TMRA_7_UDF           = 327U,
    EVT_TMRA_7_CMP           = 328U,
    EVT_TMRA_8_OVF           = 329U,
    EVT_TMRA_8_UDF           = 330U,
    EVT_TMRA_8_CMP           = 331U,
    /*  USART3 USART4  */
    EVT_USART3_EI            = 332U,
    EVT_USART3_RI            = 333U,
    EVT_USART3_TI            = 334U,
    EVT_USART3_TCI           = 335U,
    EVT_USART4_EI            = 336U,
    EVT_USART4_RI            = 337U,
    EVT_USART4_TI            = 338U,
    EVT_USART4_TCI           = 339U,
    /*  SPI3 SPI4  */
    EVT_SPI3_SPRI            = 342U,
    EVT_SPI3_SPTI            = 343U,
    EVT_SPI3_SPII            = 344U,
    EVT_SPI3_SPEI            = 345U,
    EVT_SPI3_SPEND           = 346U,
    EVT_SPI4_SPRI            = 347U,
    EVT_SPI4_SPTI            = 348U,
    EVT_SPI4_SPII            = 349U,
    EVT_SPI4_SPEI            = 350U,
    EVT_SPI4_SPEND           = 351U,
    /*  TIMERA_9 TIMERA_10 TIMERA_11 TIMERA_12  */
    EVT_TMRA_9_OVF           = 352U,
    EVT_TMRA_9_UDF           = 353U,
    EVT_TMRA_9_CMP           = 354U,
    EVT_TMRA_10_OVF          = 355U,
    EVT_TMRA_10_UDF          = 356U,
    EVT_TMRA_10_CMP          = 357U,
    EVT_TMRA_11_OVF          = 358U,
    EVT_TMRA_11_UDF          = 359U,
    EVT_TMRA_11_CMP          = 360U,
    EVT_TMRA_12_OVF          = 361U,
    EVT_TMRA_12_UDF          = 362U,
    EVT_TMRA_12_CMP          = 363U,
    /*  USART5 USART6  */
    EVT_USART5_BRKWKPI       = 364U,
    EVT_USART5_EI            = 365U,
    EVT_USART5_RI            = 366U,
    EVT_USART5_TI            = 367U,
    EVT_USART5_TCI           = 368U,
    EVT_USART6_EI            = 369U,
    EVT_USART6_RI            = 370U,
    EVT_USART6_TI            = 371U,
    EVT_USART6_TCI           = 372U,
    EVT_USART6_RTO           = 373U,
    /*  SPI5 SPI6  */
    EVT_SPI5_SPRI            = 374U,
    EVT_SPI5_SPTI            = 375U,
    EVT_SPI5_SPII            = 376U,
    EVT_SPI5_SPEI            = 377U,
    EVT_SPI5_SPEND           = 378U,
    EVT_SPI6_SPRI            = 379U,
    EVT_SPI6_SPTI            = 380U,
    EVT_SPI6_SPII            = 381U,
    EVT_SPI6_SPEI            = 382U,
    EVT_SPI6_SPEND           = 383U,
    /*  I2S1 I2S2  */
    EVT_I2S1_TXIRQOUT        = 384U,
    EVT_I2S1_RXIRQOUT        = 385U,
    EVT_I2S2_TXIRQOUT        = 387U,
    EVT_I2S2_RXIRQOUT        = 388U,
    /*  USART7 USART8  */
    EVT_USART7_EI            = 390U,
    EVT_USART7_RI            = 391U,
    EVT_USART7_TI            = 392U,
    EVT_USART7_TCI           = 393U,
    EVT_USART7_RTO           = 394U,
    EVT_USART8_EI            = 395U,
    EVT_USART8_RI            = 396U,
    EVT_USART8_TI            = 397U,
    EVT_USART8_TCI           = 398U,
    /*  HASH  */
    EVT_HASH                 = 401U,
    /*  SDIOC  */
    EVT_SDIOC1_DMAR          = 402U,
    EVT_SDIOC1_DMAW          = 403U,
    EVT_SDIOC2_DMAR          = 405U,
    EVT_SDIOC2_DMAW          = 406U,
    /*  EVENT PORT  */
    EVT_EVENT_PORT1          = 408U,
    EVT_EVENT_PORT2          = 409U,
    EVT_EVENT_PORT3          = 410U,
    EVT_EVENT_PORT4          = 411U,
    /*  ETHER  */
    EVT_ETH_PPS_OUT_0        = 414U,
    EVT_ETH_PPS_OUT_1        = 415U,
    /*  I2S3 I2S4  */
    EVT_I2S3_TXIRQOUT        = 416U,
    EVT_I2S3_RXIRQOUT        = 417U,
    EVT_I2S4_TXIRQOUT        = 419U,
    EVT_I2S4_RXIRQOUT        = 420U,
    /*  USART9 USART10  */
    EVT_USART9_EI            = 422U,
    EVT_USART9_RI            = 423U,
    EVT_USART9_TI            = 424U,
    EVT_USART9_TCI           = 425U,
    EVT_USART10_BRKWKPI      = 426U,
    EVT_USART10_EI           = 427U,
    EVT_USART10_RI           = 428U,
    EVT_USART10_TI           = 429U,
    EVT_USART10_TCI          = 430U,
    /*  I2C1 I2C2 I2C3  */
    EVT_I2C1_RXI             = 432U,
    EVT_I2C1_TXI             = 433U,
    EVT_I2C1_TEI             = 434U,
    EVT_I2C1_EEI             = 435U,
    EVT_I2C2_RXI             = 436U,
    EVT_I2C2_TXI             = 437U,
    EVT_I2C2_TEI             = 438U,
    EVT_I2C2_EEI             = 439U,
    EVT_I2C3_RXI             = 440U,
    EVT_I2C3_TXI             = 441U,
    EVT_I2C3_TEI             = 442U,
    EVT_I2C3_EEI             = 443U,
    /*  ACMP  */
    EVT_CMP1                 = 444U,
    EVT_CMP2                 = 445U,
    EVT_CMP3                 = 446U,
    EVT_CMP4                 = 447U,
    /*  I2C4 I2C5 I2C6  */
    EVT_I2C4_RXI             = 448U,
    EVT_I2C4_TXI             = 449U,
    EVT_I2C4_TEI             = 450U,
    EVT_I2C4_EEI             = 451U,
    EVT_I2C5_RXI             = 452U,
    EVT_I2C5_TXI             = 453U,
    EVT_I2C5_TEI             = 454U,
    EVT_I2C5_EEI             = 455U,
    EVT_I2C6_RXI             = 456U,
    EVT_I2C6_TXI             = 457U,
    EVT_I2C6_TEI             = 458U,
    EVT_I2C6_EEI             = 459U,
    /*  PVD  */
    EVT_PVD_PVD1             = 461U,
    EVT_PVD_PVD2             = 462U,
    /*  OTS  */
    EVT_OTS                  = 463U,
    /*  WDT  */
    EVT_WDT_REFUDF           = 467U,
    /*  ADC  */
    EVT_ADC1_EOCA            = 480U,
    EVT_ADC1_EOCB            = 481U,
    EVT_ADC1_CHCMP           = 482U,
    EVT_ADC1_SEQCMP          = 483U,
    EVT_ADC2_EOCA            = 484U,
    EVT_ADC2_EOCB            = 485U,
    EVT_ADC2_CHCMP           = 486U,
    EVT_ADC2_SEQCMP          = 487U,
    EVT_ADC3_EOCA            = 488U,
    EVT_ADC3_EOCB            = 489U,
    EVT_ADC3_CHCMP           = 490U,
    EVT_ADC3_SEQCMP          = 491U,
    /*  TRNG  */
    EVT_TRNG_END             = 492U,
    EVT_MAX                  = 511U,
} event_src_t;

/* \brief 中断源*/
typedef enum int_src {
    INT_SWI_IRQ0             = 0U,
    INT_SWI_IRQ1             = 1U,
    INT_SWI_IRQ2             = 2U,
    INT_SWI_IRQ3             = 3U,
    INT_SWI_IRQ4             = 4U,
    INT_SWI_IRQ5             = 5U,
    INT_SWI_IRQ6             = 6U,
    INT_SWI_IRQ7             = 7U,
    INT_SWI_IRQ8             = 8U,
    INT_SWI_IRQ9             = 9U,
    INT_SWI_IRQ10            = 10U,
    INT_SWI_IRQ11            = 11U,
    INT_SWI_IRQ12            = 12U,
    INT_SWI_IRQ13            = 13U,
    INT_SWI_IRQ14            = 14U,
    INT_SWI_IRQ15            = 15U,
    INT_SWI_IRQ16            = 16U,
    INT_SWI_IRQ17            = 17U,
    INT_SWI_IRQ18            = 18U,
    INT_SWI_IRQ19            = 19U,
    INT_SWI_IRQ20            = 20U,
    INT_SWI_IRQ21            = 21U,
    INT_SWI_IRQ22            = 22U,
    INT_SWI_IRQ23            = 23U,
    INT_SWI_IRQ24            = 24U,
    INT_SWI_IRQ25            = 25U,
    INT_SWI_IRQ26            = 26U,
    INT_SWI_IRQ27            = 27U,
    INT_SWI_IRQ28            = 28U,
    INT_SWI_IRQ29            = 29U,
    INT_SWI_IRQ30            = 30U,
    INT_SWI_IRQ31            = 31U,
    /*  External Interrupt   */
    INT_PORT_EIRQ0           = 0U,
    INT_PORT_EIRQ1           = 1U,
    INT_PORT_EIRQ2           = 2U,
    INT_PORT_EIRQ3           = 3U,
    INT_PORT_EIRQ4           = 4U,
    INT_PORT_EIRQ5           = 5U,
    INT_PORT_EIRQ6           = 6U,
    INT_PORT_EIRQ7           = 7U,
    INT_PORT_EIRQ8           = 8U,
    INT_PORT_EIRQ9           = 9U,
    INT_PORT_EIRQ10          = 10U,
    INT_PORT_EIRQ11          = 11U,
    INT_PORT_EIRQ12          = 12U,
    INT_PORT_EIRQ13          = 13U,
    INT_PORT_EIRQ14          = 14U,
    INT_PORT_EIRQ15          = 15U,
    /*  DMA_1  */
    INT_DMA1_TC0             = 32U,
    INT_DMA1_TC1             = 33U,
    INT_DMA1_TC2             = 34U,
    INT_DMA1_TC3             = 35U,
    INT_DMA1_TC4             = 36U,
    INT_DMA1_TC5             = 37U,
    INT_DMA1_TC6             = 38U,
    INT_DMA1_TC7             = 39U,
    INT_DMA1_BTC0            = 40U,
    INT_DMA1_BTC1            = 41U,
    INT_DMA1_BTC2            = 42U,
    INT_DMA1_BTC3            = 43U,
    INT_DAM1_BTC4            = 44U,
    INT_DMA1_BTC5            = 45U,
    INT_DMA1_BTC6            = 46U,
    INT_DMA1_BTC7            = 47U,
    INT_DMA1_ERR             = 48U,
    /*  EFM  */
    INT_EFM_PEERR            = 49U,
    INT_EFM_RDCOL            = 50U,
    INT_EFM_OPTEND           = 51U,
    /*  QSPI  */
    INT_QSPI_INTR            = 54U,
    /*  DCU  */
    INT_DCU1                 = 55U,
    INT_DCU2                 = 56U,
    INT_DCU3                 = 57U,
    INT_DCU4                 = 58U,
    INT_DCU5                 = 59U,
    INT_DCU6                 = 60U,
    INT_DCU7                 = 61U,
    INT_DCU8                 = 62U,
    /*  DMA2  */
    INT_DMA2_TC0             = 64U,
    INT_DMA2_TC1             = 65U,
    INT_DMA2_TC2             = 66U,
    INT_DMA2_TC3             = 67U,
    INT_DMA2_TC4             = 68U,
    INT_DMA2_TC5             = 69U,
    INT_DMA2_TC6             = 70U,
    INT_DMA2_TC7             = 71U,
    INT_DMA2_BTC0            = 72U,
    INT_DMA2_BTC1            = 73U,
    INT_DMA2_BTC2            = 74U,
    INT_DMA2_BTC3            = 75U,
    INT_DMA2_BTC4            = 76U,
    INT_DMA2_BTC5            = 77U,
    INT_DMA2_BTC6            = 78U,
    INT_DMA2_BTC7            = 79U,
    INT_DMA2_ERR             = 80U,
    /*  MAU  */
    INT_MAU_SQRT             = 83U,
    /*  DVP  */
    INT_DVP_FRAMSTA          = 84U,
    INT_DVP_LINESTA          = 85U,
    INT_DVP_LINEEND          = 86U,
    INT_DVP_FRAMEND          = 87U,
    INT_DVP_SQUERR           = 88U,
    INT_DVP_FIFOERR          = 89U,
    /*  FMAC  */
    INT_FMAC_1               = 91U,
    INT_FMAC_2               = 92U,
    INT_FMAC_3               = 93U,
    INT_FMAC_4               = 94U,
    /*  TIMER0  */
    INT_TMR0_1_CMPA          = 96U,
    INT_TMR0_1_CMPB          = 97U,
    INT_TMR0_2_CMPA          = 98U,
    INT_TMR0_2_CMPB          = 99U,
    /*  TIMER2  */
    INT_TMR2_1_CMPA          = 100U,
    INT_TMR2_1_CMPB          = 101U,
    INT_TMR2_1_OVFA          = 102U,
    INT_TMR2_1_OVFB          = 103U,
    INT_TMR2_2_CMPA          = 104U,
    INT_TMR2_2_CMPB          = 105U,
    INT_TMR2_2_OVFA          = 106U,
    INT_TMR2_2_OVFB          = 107U,
    INT_TMR2_3_CMPA          = 108U,
    INT_TMR2_3_CMPB          = 109U,
    INT_TMR2_3_OVFA          = 110U,
    INT_TMR2_3_OVFB          = 111U,
    INT_TMR2_4_CMPA          = 112U,
    INT_TMR2_4_CMPB          = 113U,
    INT_TMR2_4_OVFA          = 114U,
    INT_TMR2_4_OVFB          = 115U,
    /*  RTC  */
    INT_RTC_TP               = 120U,
    INT_RTC_ALM              = 121U,
    INT_RTC_PRD              = 122U,
    /*  XTAL  */
    INT_XTAL_STOP            = 125U,
    /*  WKTM  */
    INT_WKTM_PRD             = 126U,
    /*  SWDT  */
    INT_SWDT_REFUDF          = 127U,
    /*  TIMER6_1  */
    INT_TMR6_1_GCMA          = 128U,
    INT_TMR6_1_GCMB          = 129U,
    INT_TMR6_1_GCMC          = 130U,
    INT_TMR6_1_GCMD          = 131U,
    INT_TMR6_1_GCME          = 132U,
    INT_TMR6_1_GCMF          = 133U,
    INT_TMR6_1_GOVF          = 134U,
    INT_TMR6_1_GUDF          = 135U,
    /*  TIMER4_1  */
    INT_TMR4_1_GCMUH         = 136U,
    INT_TMR4_1_GCMUL         = 137U,
    INT_TMR4_1_GCMVH         = 138U,
    INT_TMR4_1_GCMVL         = 139U,
    INT_TMR4_1_GCMWH         = 140U,
    INT_TMR4_1_GCMWL         = 141U,
    INT_TMR4_1_GOVF          = 142U,
    INT_TMR4_1_GUDF          = 143U,
    /*  TIMER6_2  */
    INT_TMR6_2_GCMA          = 144U,
    INT_TMR6_2_GCMB          = 145U,
    INT_TMR6_2_GCMC          = 146U,
    INT_TMR6_2_GCMD          = 147U,
    INT_TMR6_2_GCME          = 148U,
    INT_TMR6_2_GCMF          = 149U,
    INT_TMR6_2_GOVF          = 150U,
    INT_TMR6_2_GUDF          = 151U,
    /*  TIMER4_2  */
    INT_TMR4_2_GCMUH         = 152U,
    INT_TMR4_2_GCMUL         = 153U,
    INT_TMR4_2_GCMVH         = 154U,
    INT_TMR4_2_GCMVL         = 155U,
    INT_TMR4_2_GCMWH         = 156U,
    INT_TMR4_2_GCMWL         = 157U,
    INT_TMR4_2_GOVF          = 158U,
    INT_TMR4_2_GUDF          = 159U,
    /*  TIMER6_3  */
    INT_TMR6_3_GCMA          = 160U,
    INT_TMR6_3_GCMB          = 161U,
    INT_TMR6_3_GCMC          = 162U,
    INT_TMR6_3_GCMD          = 163U,
    INT_TMR6_3_GCME          = 164U,
    INT_TMR6_3_GCMF          = 165U,
    INT_TMR6_3_GOVF          = 166U,
    INT_TMR6_3_GUDF          = 167U,
    /*  TIMER4_3  */
    INT_TMR4_3_GCMUH         = 168U,
    INT_TMR4_3_GCMUL         = 169U,
    INT_TMR4_3_GCMVH         = 170U,
    INT_TMR4_3_GCMVL         = 171U,
    INT_TMR4_3_GCMWH         = 172U,
    INT_TMR4_3_GCMWL         = 173U,
    INT_TMR4_3_GOVF          = 174U,
    INT_TMR4_3_GUDF          = 175U,
    /*  TIMER6_1  */
    INT_TMR6_1_GDTE          = 176U,
    INT_TMR6_1_SCMA          = 179U,
    INT_TMR6_1_SCMB          = 180U,
    /*  TIMER4_1  */
    INT_TMR4_1_RLOU          = 181U,
    INT_TMR4_1_RLOV          = 182U,
    INT_TMR4_1_RLOW          = 183U,
    /*  TIMER6_2  */
    INT_TMR6_2_GDTE          = 184U,
    INT_TMR6_2_SCMA          = 187U,
    INT_TMR6_2_SCMB          = 188U,
    /*  TIMER4_2  */
    INT_TMR4_2_RLOU          = 189U,
    INT_TMR4_2_RLOV          = 190U,
    INT_TMR4_2_RLOW          = 191U,
    /*  TIMER6_3  */
    INT_TMR6_3_GDTE          = 192U,
    INT_TMR6_3_SCMA          = 195U,
    INT_TMR6_3_SCMB          = 196U,
    /*  TIMER4_3  */
    INT_TMR4_3_RLOU          = 197U,
    INT_TMR4_3_RLOV          = 198U,
    INT_TMR4_3_RLOW          = 199U,
    /*  TIMER6_4 TIMER6_5  */
    INT_TMR6_4_GCMA          = 208U,
    INT_TMR6_4_GCMB          = 209U,
    INT_TMR6_4_GCMC          = 210U,
    INT_TMR6_4_GCMD          = 211U,
    INT_TMR6_4_GCME          = 212U,
    INT_TMR6_4_GCMF          = 213U,
    INT_TMR6_4_GOVF          = 214U,
    INT_TMR6_4_GUDF          = 215U,
    INT_TMR6_4_GDTE          = 216U,
    INT_TMR6_4_SCMA          = 219U,
    INT_TMR6_4_SCMB          = 220U,
    INT_TMR6_5_GCMA          = 224U,
    INT_TMR6_5_GCMB          = 225U,
    INT_TMR6_5_GCMC          = 226U,
    INT_TMR6_5_GCMD          = 227U,
    INT_TMR6_5_GCME          = 228U,
    INT_TMR6_5_GCMF          = 229U,
    INT_TMR6_5_GOVF          = 230U,
    INT_TMR6_5_GUDF          = 231U,
    INT_TMR6_5_GDTE          = 232U,
    INT_TMR6_5_SCMA          = 235U,
    INT_TMR6_5_SCMB          = 236U,
    /*  TIMERA_1  */
    INT_TMRA_1_OVF           = 237U,
    INT_TMRA_1_UDF           = 238U,
    INT_TMRA_1_CMP           = 239U,
    /*  TIMER6_6  */
    INT_TMR6_6_GCMA          = 240U,
    INT_TMR6_6_GCMB          = 241U,
    INT_TMR6_6_GCMC          = 242U,
    INT_TMR6_6_GCMD          = 243U,
    INT_TMR6_6_GCME          = 244U,
    INT_TMR6_6_GCMF          = 245U,
    INT_TMR6_6_GOVF          = 246U,
    INT_TMR6_6_GUDF          = 247U,
    INT_TMR6_6_GDTE          = 248U,
    INT_TMR6_6_SCMA          = 251U,
    INT_TMR6_6_SCMB          = 252U,
    /*  TIMERA_2  */
    INT_TMRA_2_OVF           = 253U,
    INT_TMRA_2_UDF           = 254U,
    INT_TMRA_2_CMP           = 255U,
    /*  TIMER6_7  */
    INT_TMR6_7_GCMA          = 256U,
    INT_TMR6_7_GCMB          = 257U,
    INT_TMR6_7_GCMC          = 258U,
    INT_TMR6_7_GCMD          = 259U,
    INT_TMR6_7_GCME          = 260U,
    INT_TMR6_7_GCMF          = 261U,
    INT_TMR6_7_GOVF          = 262U,
    INT_TMR6_7_GUDF          = 263U,
    INT_TMR6_7_GDTE          = 264U,
    INT_TMR6_7_SCMA          = 267U,
    INT_TMR6_7_SCMB          = 268U,
    /*  TIMERA_3  */
    INT_TMRA_3_OVF           = 269U,
    INT_TMRA_3_UDF           = 270U,
    INT_TMRA_3_CMP           = 271U,
    /*  TIMER6_8  */
    INT_TMR6_8_GCMA          = 272U,
    INT_TMR6_8_GCMB          = 273U,
    INT_TMR6_8_GCMC          = 274U,
    INT_TMR6_8_GCMD          = 275U,
    INT_TMR6_8_GCME          = 276U,
    INT_TMR6_8_GCMF          = 277U,
    INT_TMR6_8_GOVF          = 278U,
    INT_TMR6_8_GUDF          = 279U,
    INT_TMR6_8_GDTE          = 280U,
    INT_TMR6_8_SCMA          = 283U,
    INT_TMR6_8_SCMB          = 284U,
    /*  TIMERA_4  */
    INT_TMRA_4_OVF           = 285U,
    INT_TMRA_4_UDF           = 286U,
    INT_TMRA_4_CMP           = 287U,
    /*  EMB  */
    INT_EMB_GR0              = 288U,
    INT_EMB_GR1              = 289U,
    INT_EMB_GR2              = 290U,
    INT_EMB_GR3              = 291U,
    INT_EMB_GR4              = 292U,
    INT_EMB_GR5              = 293U,
    INT_EMB_GR6              = 294U,
    /*  USBHS  */
    INT_USBHS_EP1_OUT        = 295U,
    INT_USBHS_EP1_IN         = 296U,
    INT_USBHS_GLB            = 297U,
    INT_USBHS_WKUP           = 298U,
    /*  USART1 USART2  */
    INT_USART1_EI            = 300U,
    INT_USART1_RI            = 301U,
    INT_USART1_TI            = 302U,
    INT_USART1_TCI           = 303U,
    INT_USART1_RTO           = 304U,
    INT_USART2_EI            = 305U,
    INT_USART2_RI            = 306U,
    INT_USART2_TI            = 307U,
    INT_USART2_TCI           = 308U,
    INT_USART2_RTO           = 309U,
    /*  SPI1 SPI2  */
    INT_SPI1_SPRI            = 310U,
    INT_SPI1_SPTI            = 311U,
    INT_SPI1_SPII            = 312U,
    INT_SPI1_SPEI            = 313U,
    INT_SPI2_SPRI            = 315U,
    INT_SPI2_SPTI            = 316U,
    INT_SPI2_SPII            = 317U,
    INT_SPI2_SPEI            = 318U,
    /*  TIMERA_5 TIMERA_6 TIMERA_7 TIMERA_8  */
    INT_TMRA_5_OVF           = 320U,
    INT_TMRA_5_UDF           = 321U,
    INT_TMRA_5_CMP           = 322U,
    INT_TMRA_6_OVF           = 323U,
    INT_TMRA_6_UDF           = 324U,
    INT_TMRA_6_CMP           = 325U,
    INT_TMRA_7_OVF           = 326U,
    INT_TMRA_7_UDF           = 327U,
    INT_TMRA_7_CMP           = 328U,
    INT_TMRA_8_OVF           = 329U,
    INT_TMRA_8_UDF           = 330U,
    INT_TMRA_8_CMP           = 331U,
    /*  USART3 USART4  */
    INT_USART3_EI            = 332U,
    INT_USART3_RI            = 333U,
    INT_USART3_TI            = 334U,
    INT_USART3_TCI           = 335U,
    INT_USART4_EI            = 336U,
    INT_USART4_RI            = 337U,
    INT_USART4_TI            = 338U,
    INT_USART4_TCI           = 339U,
    /*  CAN1 CAN2  */
    INT_CAN1_HOST            = 340U,
    INT_CAN2_HOST            = 341U,
    /*  SPI3 SPI4  */
    INT_SPI3_SPRI            = 342U,
    INT_SPI3_SPTI            = 343U,
    INT_SPI3_SPII            = 344U,
    INT_SPI3_SPEI            = 345U,
    INT_SPI4_SPRI            = 347U,
    INT_SPI4_SPTI            = 348U,
    INT_SPI4_SPII            = 349U,
    INT_SPI4_SPEI            = 350U,
    /*  TIMERA_9 TIMERA_10 TIMER_11 TIMER_12  */
    INT_TMRA_9_OVF           = 352U,
    INT_TMRA_9_UDF           = 353U,
    INT_TMRA_9_CMP           = 354U,
    INT_TMRA_10_OVF          = 355U,
    INT_TMRA_10_UDF          = 356U,
    INT_TMRA_10_CMP          = 357U,
    INT_TMRA_11_OVF          = 358U,
    INT_TMRA_11_UDF          = 359U,
    INT_TMRA_11_CMP          = 360U,
    INT_TMRA_12_OVF          = 361U,
    INT_TMRA_12_UDF          = 362U,
    INT_TMRA_12_CMP          = 363U,
    /*  USART5 USART6  */
    INT_USART5_BRKWKPI       = 364U,
    INT_USART5_EI            = 365U,
    INT_USART5_RI            = 366U,
    INT_USART5_TI            = 367U,
    INT_USART5_TCI           = 368U,
    INT_USART6_EI            = 369U,
    INT_USART6_RI            = 370U,
    INT_USART6_TI            = 371U,
    INT_USART6_TCI           = 372U,
    INT_USART6_RTO           = 373U,
    /*  SPI5 SPI6  */
    INT_SPI5_SPRI            = 374U,
    INT_SPI5_SPTI            = 375U,
    INT_SPI5_SPII            = 376U,
    INT_SPI5_SPEI            = 377U,
    INT_SPI6_SPRI            = 379U,
    INT_SPI6_SPTI            = 380U,
    INT_SPI6_SPII            = 381U,
    INT_SPI6_SPEI            = 382U,
    /*  I2S1 I2S2  */
    INT_I2S1_TXIRQOUT        = 384U,
    INT_I2S1_RXIRQOUT        = 385U,
    INT_I2S1_ERRIRQOUT       = 386U,
    INT_I2S2_TXIRQOUT        = 387U,
    INT_I2S2_RXIRQOUT        = 388U,
    INT_I2S2_ERRIRQOUT       = 389U,
    /*  USART7 USART8  */
    INT_USART7_EI            = 390U,
    INT_USART7_RI            = 391U,
    INT_USART7_TI            = 392U,
    INT_USART7_TCI           = 393U,
    INT_USART7_RTO           = 394U,
    INT_USART8_EI            = 395U,
    INT_USART8_RI            = 396U,
    INT_USART8_TI            = 397U,
    INT_USART8_TCI           = 398U,
    /*  USBFS  */
    INT_USBFS_GLB            = 399U,
    INT_USBFS_WKUP           = 400U,
    /*  HASH  */
    INT_HASH                 = 401U,
    /*  SDIOC  */
    INT_SDIOC1_SD            = 404U,
    INT_SDIOC2_SD            = 407U,
    /*  EVENT PORT  */
    INT_EVENT_PORT1          = 408U,
    INT_EVENT_PORT2          = 409U,
    INT_EVENT_PORT3          = 410U,
    INT_EVENT_PORT4          = 411U,
    /*  ETHER  */
    INT_ETH_GLB_INT          = 412U,
    INT_ETH_WKP_INT          = 413U,
    /*  I2S3 I2S4  */
    INT_I2S3_TXIRQOUT        = 416U,
    INT_I2S3_RXIRQOUT        = 417U,
    INT_I2S3_ERRIRQOUT       = 418U,
    INT_I2S4_TXIRQOUT        = 419U,
    INT_I2S4_RXIRQOUT        = 420U,
    INT_I2S4_ERRIRQOUT       = 421U,
    /*  USART9 USART10  */
    INT_USART9_EI            = 422U,
    INT_USART9_RI            = 423U,
    INT_USART9_TI            = 424U,
    INT_USART9_TCI           = 425U,
    INT_USART10_BRKWKPI      = 426U,
    INT_USART10_EI           = 427U,
    INT_USART10_RI           = 428U,
    INT_USART10_TI           = 429U,
    INT_USART10_TCI          = 430U,
    /*  I2C1 I2C2 I2C3  */
    INT_I2C1_RXI             = 432U,
    INT_I2C1_TXI             = 433U,
    INT_I2C1_TEI             = 434U,
    INT_I2C1_EEI             = 435U,
    INT_I2C2_RXI             = 436U,
    INT_I2C2_TXI             = 437U,
    INT_I2C2_TEI             = 438U,
    INT_I2C2_EEI             = 439U,
    INT_I2C3_RXI             = 440U,
    INT_I2C3_TXI             = 441U,
    INT_I2C3_TEI             = 442U,
    INT_I2C3_EEI             = 443U,
    /*  ACMP  */
    INT_CMP1                 = 444U,
    INT_CMP2                 = 445U,
    INT_CMP3                 = 446U,
    INT_CMP4                 = 447U,
    /*  I2C4 I2C5 I2C6  */
    INT_I2C4_RXI             = 448U,
    INT_I2C4_TXI             = 449U,
    INT_I2C4_TEI             = 450U,
    INT_I2C4_EEI             = 451U,
    INT_I2C5_RXI             = 452U,
    INT_I2C5_TXI             = 453U,
    INT_I2C5_TEI             = 454U,
    INT_I2C5_EEI             = 455U,
    INT_I2C6_RXI             = 456U,
    INT_I2C6_TXI             = 457U,
    INT_I2C6_TEI             = 458U,
    INT_I2C6_EEI             = 459U,
    /*  USART1  */
    INT_USART1_WUPI          = 460U,
    /*  PVD  */
    INT_PVD_PVD1             = 461U,
    INT_PVD_PVD2             = 462U,
    /*  OTS  */
    INT_OTS                  = 463U,
    /*  FCM  */
    INT_FCMFERRI             = 464U,
    INT_FCMMENDI             = 465U,
    INT_FCMCOVFI             = 466U,
    /*  WDT  */
    INT_WDT_REFUDF           = 467U,
    /*  CTC  */
    INT_CTC_ERR              = 468U,
    /*  ADC  */
    INT_ADC1_EOCA            = 480U,
    INT_ADC1_EOCB            = 481U,
    INT_ADC1_CMP0            = 482U,
    INT_ADC1_CMP1            = 483U,
    INT_ADC2_EOCA            = 484U,
    INT_ADC2_EOCB            = 485U,
    INT_ADC2_CMP0            = 486U,
    INT_ADC2_CMP1            = 487U,
    INT_ADC3_EOCA            = 488U,
    INT_ADC3_EOCB            = 489U,
    INT_ADC3_CMP0            = 490U,
    INT_ADC3_CMP1            = 491U,
    /*  TRNG  */
    INT_TRNG_END             = 492U,
    /*  NFC  */
    INT_NFC_INT              = 496U,
    INT_MAX                  = 511U,
} IRQ_Src;

#define RW_MEM8(addr)                   (*(volatile uint8_t *)(addr))
#define RW_MEM16(addr)                  (*(volatile uint16_t *)(addr))
#define RW_MEM32(addr)                  (*(volatile uint32_t *)(addr))

/* \brief 寄存器写操作*/
#define WRITE_REG8(REG, VAL)            ((REG) = ((uint8_t)(VAL)))
#define WRITE_REG16(REG, VAL)           ((REG) = ((uint16_t)(VAL)))
#define WRITE_REG32(REG, VAL)           ((REG) = ((uint32_t)(VAL)))

/* \brief 寄存器读操作*/
#define READ_REG8(REG)                  (REG)
#define READ_REG16(REG)                 (REG)
#define READ_REG32(REG)                 (REG)

/* \brief 寄存器读位操作*/
#define READ_REG8_BIT(REG, BIT)         ((REG) & ((uint8_t)(BIT)))
#define READ_REG16_BIT(REG, BIT)        ((REG) & ((uint16_t)(BIT)))
#define READ_REG32_BIT(REG, BIT)        ((REG) & ((uint32_t)(BIT)))

/* \brief 寄存器修改位操作*/
#define MODIFY_REG8(REGS, CLEARMASK, SETMASK)   (WRITE_REG8((REGS), (((READ_REG8((REGS))) & ((uint8_t)(~((uint8_t)(CLEARMASK))))) | ((uint8_t)(SETMASK) & (uint8_t)(CLEARMASK)))))
#define MODIFY_REG16(REGS, CLEARMASK, SETMASK)  (WRITE_REG16((REGS), (((READ_REG16((REGS))) & ((uint16_t)(~((uint16_t)(CLEARMASK))))) | ((uint16_t)(SETMASK) & (uint16_t)(CLEARMASK)))))
#define MODIFY_REG32(REGS, CLEARMASK, SETMASK)  (WRITE_REG32((REGS), (((READ_REG32((REGS))) & ((uint32_t)(~((uint32_t)(CLEARMASK))))) | ((uint32_t)(SETMASK) & (uint32_t)(CLEARMASK)))))

/* \brief 寄存器设置位为1*/
#define SET_REG8_BIT(REG, BIT)          ((REG) |= ((uint8_t)(BIT)))
#define SET_REG16_BIT(REG, BIT)         ((REG) |= ((uint16_t)(BIT)))
#define SET_REG32_BIT(REG, BIT)         ((REG) |= ((uint32_t)(BIT)))

/* \brief 寄存器清除位*/
#define CLEAR_REG8_BIT(REG, BIT)        ((REG) &= ((uint8_t)(~((uint8_t)(BIT)))))
#define CLEAR_REG16_BIT(REG, BIT)       ((REG) &= ((uint16_t)(~((uint16_t)(BIT)))))
#define CLEAR_REG32_BIT(REG, BIT)       ((REG) &= ((uint32_t)(~((uint32_t)(BIT)))))

#ifdef __cplusplus
}
#endif  /* __cplusplus  */

#endif
